I also want to note that some people are looking at using ML/DL to generate placement solutions, even though DREAMPlace is still a key recent work in this area that at the core uses analytical placement, although cleverly using deep learning libraries and features.

For example, the VTR people are looking at RL to pick what actions to take during FPGA placement for their simulated annealing placer (see: https://ieeexplore.ieee.org/document/9415585).

I also know this paper/poster was indexed recently under OpenRevew but I'm still waiting for some more implementation details to look at: https://openreview.net/forum?id=6GR8KqWCWf

FPGA routing I don't think anyone has touched on using ML/DL but I do know that there is some talk about using ML/DL models with current routing approaches to replace search heuristics (think like replacing or augmenting something like A*) or do routability predictions. Certainly, there are probably many ways to use RL in routing as there are many places in current algorithms to intelligently make certain heuristic decisions.

Edit: I also want to note that there are a ton of works that also use ML/DL to tune the "hyperparameters" of EDA tools such as placers and routers. Think ML/DL for back-box non-linear optimization.