I only know about xilinx specific, but even given the support for runtime updates to the FPGA logic that already exist in the xilinx kernels, there are serious roadblocks to updating only portions of the FPGA array.

The logic must be very carefully implemented to allow over-writing only specific regions of the FPGA.

If you're re-flashing the entire logic array, it's pretty straightforward. If you want to leave some logic in and add an additional funcitonality, this is much more difficult.

This is really a limitaiton of the FPGA logic array implementation, not a linux shortcoming...