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Comment by wslh | Hacker News Reader

I have just folllowing this incompatibilities between platforms being Microsoft Windows first (and last). As someone working in reverse engineering, cybersecurity, etc I wounder how really difficult is to port from Windows to Linux? Someone has estimations about effort estimation on number of people and required time for bootstraping this project and also the efforts for supporting changes over time.

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> Someone has estimations about effort estimation on number of people and required time for bootstraping this project

A small team of systems programmers for months, or a dedicated teenager a week. More seriously it highly depends on how they decided to implement it, if it's a custom instruction set extension it could be relatively easy

Love your two alternatives because it is the typical project that requires passion and drive.

It is not an ISA extension.

It is a separate ML/AI accelerator with a VLIW architecture.

https://www.amd.com/en/technologies/xdna.html

XDNA is documented by AMD, but I have not read the documents, so I do not know how much work would be to make a compiler and other tools for it.

https://ryzenai.docs.amd.com/en/latest/

Hmm looking at the architecture it seems like it would be though to create performant tooling quickly (especially if it needs reverse engineering), the VLIW/RISC ISA along with a CUDA-like threading model, and the tensor-flow (pun intended) for efficient cascading of neighboring AIE. On the other hand this arch does give it a very high ceiling so I get why they would go for it.

Not sure if I completely understand what "Ryzen AI" does, but tinygrad for example has some limited support for RDNA3[0]. It isn't quite there yet in matters of performance though, as you can read in the comments of that file.

There's also a small tutorial by AMD on how to use the WMMA intrinsics[1] using their hipcc[2] compiler. Documentation is sparse kinda sparse, but the instruction set is not huge. The RDNA3 ISA guide[3] might also be helpful (and only a fraction of the pages are relevant.)

So it doesn't seem like RE is necessary? AMD dumped most code on GitHub.

0. https://github.com/tinygrad/tinygrad/blob/master/extra/gemm/...

1. https://gpuopen.com/learn/wmma_on_rdna3/

2. https://github.com/ROCm/HIPCC

3. https://www.amd.com/content/dam/amd/en/documents/radeon-tech...

Assuming it's the same 'tile' tech they're using in their GPUs, it's a chiplet with a Xilinx FPGA with hard IP blocks where appropriate.[1] So it's probably a matter of reverse engineering the bitstream as well as the functionality of those hard IP blocks.

[1] My bet would be that it's mostly (90%+) hard IP blocks since most of the functionality for deep neural nets is well known and the FPGA logic just glues everything together and gives them some wiggle room as architectures evolve.

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