It seems most people designing an ISA will do RISC, but when I designed the ISA for the Vircon32 CPU I instead took 32-bit x86 as a basis. I had done ASM in MS-DOS so it was what I knew best. I simplified it a lot in various ways but one of them was key: it cannot split registers to use 8 or 16 bit data. This alone was enough for me to reduce the opcode list to just 64 (6 bits, so no unused opcodes). And that is even adding a few math instructions to handle floats.