Could you explain why? A JTAG master seems easily bit-bangable unless you require high data rates?
Here's an Arduino project to program CPLDS/FPGAs using XSVF files https://github.com/wschutzer/xsvfduino
I'd say that the cheap programming cables are abundant and already compatible with the vendor tools so there's not much motivation to reinvent the wheel.
Any MCU can bitbang JTAG at 100kHz. Try doing it at 30 MHz sustained.