Comment by zer00eyz | Hacker News Reader

Comment by zer00eyz | Hacker News Reader

>>> Notice what is happening here: TSMC, unlike its historical pattern, is not keeping (all of its) 5nm capacity to make low-cost high-margin chips in fully-depreciated fabs; rather, it is going to repurpose some amount of equipment — probably as much as it can manage — to 3nm, which will allow it to expand its capacity without a commensurate increase in capital costs. This will both increase the profitability of 3nm and also recognizes the reality that is afflicting TSMC’s 7nm node: there is an increasingly large gap between the leading edge and “good enough” nodes for the vast majority of use cases.

My understanding is that 5nm has been and continues to be "problematic" in terms of yield. The move to 3nm seems to not be afflicted by as many issues. There is also a massive drive to get more volume (and a die shrink will do that), due to the demands of all things ML.

I suspect that TSMC's move here is a bit more nuanced than the (valid) point that the article is making on this step...

5nm is good yield at the moment. It's even fully automotive qualified, which is a testament to its yield. But performance advantage vs cost doesn't justify to move from 7nm for a lot of designs. So tech adoption is getting stickier. For hogh performance designs like Apple CPUs going to the cutting edge is a given. So since 3nm is available 5nm lost its appeal. This is a new territory for TSMC but I think they handled it well. Just last year they were gearing up a lot of 5nm capacity in anticipation of people moving from 12 and 7nm to 5nm. It quickly became clear that this isn't happening. So they moved some of this to 3nm and some is going back to 7nm and 6nm (shrunk 7nm) I think. They are also cautious about buying the newest equipment from ASML unlike Intel and Samsung. This seems to play well for TSMC.

I think TSMC learned from Intel's downfall more than Intel. I don't see any industry traction from IFS. They can research any new technology they want. Without wafer orders it's a recipe for a quick cash burn..

> some is going back to 7nm and 6nm (shrunk 7nm) I think

You can also see the lasting popularity of 7nm-class nodes in consumer products. For example, RDNA3 uses 5nm for the core parts (GCD), but the peripheral parts (the memory chiplets/MCDs) are built on 6nm, and the monolithic low-end parts (RX 7600) are even fully built on 6nm.

I think it's time to stop talking about node sizes. This reads as meaningless to me, not because I don't know what nanometers are, but because the nodes are all defined by a set of technological changes that have little to do with the measurements, and they are all very incremental and interchangeable at this point, so each node doesn't require an entirely new fab. Actually this has always been mostly true, but the capital investment of new equipment used to be less than the risk of variance from process modification. I don't think this is the case anymore. I expect to see gradually-evolving processes that are sold to customers as performance targets rather than fixed fabrication methods. Even the designs may need some kind of meta-representation that gets 'compiled' to a process, which may have traveller variances like metallization layers.

Of course we don't need to know everything, but in terms of news, maybe we could reference key technologies in use that have the largest effect on performance targets and downstream process modification.

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