We looked at some popular RISC and CISC architectures, even looked at Itanium [1] as it was the hot new thing at the time. The professor didn't necessarily hate Intel, just the x86 architecture.
It would have been fine if x86 ceased to exist after 80486 or 80586, yet it has persevered and has continued to cause trouble with an incessant stream of extensions supplanting the previous generations, or expanding or «enhancing» them: MMX, then SSE (plus a further extension to the extension courtesy of amd64), SSE2, SSE3, SSSE3, then AVX, AVX2 and AVX512, and now AVX10 that is an overhaul of all previous extensions.
With a little bit of the design thinking and future proofing in mind, that hairy abominable mess could have been replaced with a single, scalable vector extension that would have not required a complete code rewrite over the next 30 years. Yet, MBA's over at Intel continued to milk the already ailing cow.
Whereas each of the MMX, SSE and AVX extensions was effectively a new instruction set, AND each had its own register set – 64, 128, 256 and 512 bit registers. Later generations (i.e. AVX2 and AVX-512) are better thought out, but, e.g. MMX – I do not think anyone uses it today, yet it is present in the silicon as the dead space.
Prior art existed long before – Cray had vector instructions first, so it is not like Intel had to invent them from scratch.
It is still a common belief Intel created the Itanium to fool the proprietary unix vendors into thinking they can stop developing their own RISC CPU, but as soon as it happened, Intel gave up on Itanium as well. Solaris lasted a little bit longer only because Sun gave up early on Itanium.
Contrariwise, although I think some of amd's choices in the initial design of amd64 have hurt its longevity—they could have made more breaks from 32-bit x86, although it is understandable why they didn't at the time—intel has been very careful and has done an extremely good job of playing the hand it's been dealt.