>1.6nm
Gotta love how we now have fractions of a near meaningless metric.
Gotta love how we now have fractions of a near meaningless metric.
What more do you want? It’s as meaningful as a single number ever could be.
If you’re a consumer - if you don’t design chips - lower number means there’s some improvement somewhere. That’s all you need to know. It’s like horse powers on a car. The number doesn’t tell you everything about the performance under all conditions but it gives a rough idea comparatively speaking.
If you’re a chip designer then you never cared about the number they used in naming the process anyway. You would dig into the specification and design rules from the fab to understand the process. The “nm” number might show up in the design rules somewhere.. but that’s never been relevant to anyone, ever.
I really don’t understand why so many commenters feel the need to point out that “nm” doesn’t refer to a physical dimension. Who cares? It doesn’t have any impact on anyone. It’s very mildly interesting at best. It’s a near meaningless comment.
trying to understand the economic impact of these announcements as I don't understand this topic well enough
That's just patently wrong.
The measurement used to refer to feature size [0]. It used to be a physical measurement of a thing in nanometers hence nm
Now it's a free for all marketing team names it whatever the fuck they want. That's why you get stuff like intel 10nm being equivalent to AMD 7nm. [1]. It's not real.
>Who cares?
You...else we wouldn't be having this discussion
[0] https://en.wikipedia.org/wiki/Semiconductor_device_fabricati...
[1] https://www.pcgamer.com/chipmaking-process-node-naming-lmc-p...
http://dataphys.org/list/grace-hopper-nanoseconds/
and the field of play here isn't 1D linear .. it's somewhere sort of a bit slightly > 2D (elements can be stacked, there are limitations on how much and how close)
Time to kick an ants nest here...
Quantum mechanics is a useless study that had no business being a scientific field. The most fundamental principles, like quantum superposition, can never be tested or validated and therefore could never be used to be predictive of anything other than similarly theoretical ideas.
This means that when different manufacturers use a different transistor design, their 'nm' process could be the same but their transistor density different.
We could just divide total gates by surface area for the chip, but that would confuse the process efficiency with the implementation details and then we sacrifice instructions per second for a marketing number.
mm² is perfectly adequate for what we are after.
"how large a planar FET should be for the transistor density used in this process"
Is this the case, I'm not entirely sure. If it is, there be a better unit for this measurement, absolutely.
PLANETS: PLANar Equivalent Transistor Size
Or hire a marketing team to figure a good one.
It's the same situation as when AMD started putting numbers in their Athlon XP SKUs to tell "this CPU performs just as good as intel of that frequency".
I, for one, think it makes sense. Because as I consumer I don't care about actual transited length or density, all I care about is: performance, efficiency, price. I can assume that going from TSMC N5 to TSMC N3 would result in an increase in efficiency and performance.
People that do care about those things (i.e. electrical engineers) most likely don't use marketing materials...
The nm has always been a very rough approximate proxy for transistor density. Nothing has really changed about how what the number implies.
I find it so weird how so many people on hacker is so hung up on the “nm” numbering. None of these people are designing standard cell libraries and those that actually design standard cell libraries never cared about what’s in the marketing material anyway.
Lowe number means higher transistor density in some ways, on some parts of the chip. That’s all
Just because you can't point to a specific feature and say that is 1.6nm, doesn't make the label meaningless as so many try to assert. It is a label that represents a process that results in a specific transistor density. What label would you prefer?
It used to be the actual feature size which was quadratically proportional to transistor density.
Once feature size stopped being meaningful they continued using it by extrapolating from transistor density, ie whenever they would quadruple density they'd half this massive number. This, therefore, includes innovations like finfets and other " 2.5D" technologies
Is that largely correct? Because it's gross.
N1.6 is much better for naming node processes. Or even TSMC16.
They could invent codenames, or start using a better (physical) metric, if this one is no longer relevant.
From roughly the 1960s through the end of the 1990s, the number meant printed gate lengths or half-pitch (which were identical).
At some point, companies started using "equivalences" which became increasingly detached from reality. If my 50nm node had better performance than your 30nm node because I have FinFETs or SOI or whatever, shouldn't I call mine 30nm? But at that point, if you have something less than 30nm somewhere in your process, shouldn't you call it 20nm? And so the numbers detached from reality.
So now when you see a 1.6nm process, it's think "1.6nm class", rather than that corresponding to any specific feature size, and furthermore, understand that companies invent class number exaggerations differently. For example, an Intel 10nm roughly corresponds to Samsung / TSMC 7nm (and all would probably be around 15-30nm before equivalences).
That should give you enough for a web search if you want all the dirty details.
Chip frequencies stagnated (end of Dennard scaling if I remember correctly) giving the impression that single threaded performance had stagnated, but since then chip makers have used increasing data and instruction parallelism to squeeze even more apparent single threaded performance out of chips. A 3ghz chip today is usually way faster on average code than a 3ghz chip 15 years ago. They also started expanding into multiple cores and adding more cache of course.
For fab processes we should just switch to transistor density. That still wouldn't capture everything (e.g. power efficiency) but would be a lot better than not-actually-nanometers.
For performance we really don't have a good single metric anymore since all these performance hacks mean different levels of gain on different code.
Indeed
May I propose transistor density divided by the (ergodic) average transistor switching power?
The marketing departments of silicon companies are saving that as their ultimate weapon.
Chip frequencies didn't detach from the reality. However, as you point out, the performance improved regardless because frequency wasn't the only thing that could be improved.
Another poster summarized what happened with transistor 'density'. New techniques were invented that 'effectively' improved performance, and the industry apparently wanted to continue to use this one number as the basic benchmark.
Not really the same thing, though. If I buy a chip that's advertised as 3.4GHz, it'll run at 3.4GHz. Maybe not all the time, but it'll achieve that speed. If I buy a chip advertised as being produced with a 3nm process, there's nothing even resembling 3nm on there.