> but if the code contains independent SVE streams, you will be stalled.
Can you explain why thats bad?
Don't you still get full utilisation of the 4x128b units?
Can you explain why thats bad?
Don't you still get full utilisation of the 4x128b units?
This is why I like the ARM/Apple design with "regular SIMD" and "streaming SIMD". The regular SIMD is latency-optimized and offers versatile functionality for more flexible data swizzling, while the streaming SIMD uses long vectors and is optimized for throughput.