Would it be fair to day that ARM for example is a CISC/RISC hybrid, where armv8-a is full on CISC but armv8-m is RISC proper? But that's what I'm suggesting anyways.
Would it be fair to day that ARM for example is a CISC/RISC hybrid, where armv8-a is full on CISC but armv8-m is RISC proper? But that's what I'm suggesting anyways.
RISC embraces niche while avoiding complex.
iAPX432 has examples of complex with stuff like OOP, garbage collection, and even data structures baked into the ISA. These instructions are very complex and take massive numbers of cycles to complete.
In contrast, a bunch of bit manipulation instructions are niche, but any one of them can complete in just 1 or maybe 2 cycles.
Same with something like AES where even x86 has a RISC-like approach where you call a couple simple instructions to setup, then you call a simple instruction (1-2 cycles) for each round then call some simple finalization instructions. Each instruction is niche, but not complex.