I wonder if instead of having SMT, processors could briefly power off the unused ALUs/FPUs while waiting for something further up the pipeline, and focus on reducing heat and power consumption rather than maximizing utilization.
I really don't expect SMT to stay much longer. Even more so with timing visibility crosstalk issues lurking and big/small architectures offering more parallelism per chip area where single thread performance isn't in the spotlight. Or perhaps the marketing challenge of removing a feature that had once been the pride of the company is so big that SMT stays forever.
My guess is this will help them improve ST perf. We will see how well it works, and if amd will follow
Or stack them vertically, so the least consistently used parts of the chip are farthest away from the heat sink, delaying throttling.
AMD 3D-Vcache technology shows that stacking an additional layer of transistors has a significant effect on thermal limits of a modern CPU. The extra cache is strategically placed over parts of the CPU die that use less power, yet those CPUs still have to run at lower temperatures and power settings compared to their non-vcache models. Just because you can build it doesn't mean that it will be a good fit for the mass market.