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Thanks for a great product!

A (small?) ask. Can we have instruction timings please? Like how many cycles SMLAL (signed multiply long, with accumulate) takes?

Will there be an official development board with all 48 GPIOs exposed?

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Cortex-M33 timings aren't documented, but one of our security consultants has made a lot of progress reverse engineering them to support his work on trace stacking for differential power analysis of our AES implementation. I've asked him to write this up to go in a future rev of the datasheet.

No official 48 GPIO board, I think: this is slightly intentional because it creates market space for our partners to do something.

> I've asked him to write this up to go in a future rev of the datasheet.

Thanks!

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