This is fantastic. I once dreamed of making a generic interface card that could be programmed at will, using, say, a raspberry pi. However, a look through the timing diagrams in Sather shows surprisingly tiny latencies between the address and r/w signals hitting the bus, and the memory value needing to be presented. I concluded that an fpga would probably be required. Always fun when you can wait a few years and someone smarter than you builds the thing you imagined!