> Are there any modern CPUs that do what RISC did and the instructions were directly implemented in circuitry, bypassing microcode translation?

ARM, mostly. Instructions are 32 bits wide and aligned on 4-byte boundaries. This simplifies instruction decode. IA-32 does not require this, leading to considerable complexity in superscalar instruction fetch and decode.

The ARM instruction set isn't very "reduced" any more.[1] Despite this, on larger CPUs, most instructions in modern CPUs have direct hardware implementations. There are enough transistors available to do it that way.

[1] file:///home/john/Downloads/arm_instruction_set_reference_guide_100076_0100_00_en.pdf