It looks like they disabled a feature flag. I didn't expect to see such things in CPUs.
It's very very expensive to fix a bug in a CPU, so it's easier to expose control flags or microcode so you can patch it out.
https://www.ardent-tool.com/CPU/Cyrix_Cx486.html#soft
https://www.vogons.org/viewtopic.php?t=45756 Register settings for various CPUs
https://www.vogons.org/viewtopic.php?t=30607 Cyrix 5x86 Register Enhancements Revealed
L1, Branch Target Buffer, LSSER (load/store reordering), Loop Buffer, Memory Type Range Registers (Write Combining, Cacheability), all controlled using client side software.
Cyrix 5x86 testing of Loop Buffer showed 0.2% average boost and 2.7% maximum observable speed boost.