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Comment by bloomingkales | Hacker News Reader

Gonna pile on:

At this point we may need TSMC to make a specialized chip to run Electron.

ARM already has them. https://developer.arm.com/documentation/ddi0602/2022-03/SIMD...

This was discussed before and interesting but apparently the name of that instruction is misleading. Someone had chimed in and talked about how having Javascript in its name is entirely unnecessary as that exact same floating point representation is commonly used outside Javascript as well.

If you disassemble some armv8 binaries that aren't dealing with Javascript, you do see still see FJCVTZS.

It has been done for Java [1] and as we make smaller and smaller chips who knows.

[1] https://en.wikipedia.org/wiki/Jazelle

There are already specialized instructions in the Apple Silicon chips. IIRC there's something tailored for the Objective-C runtime, and something useful for Javascript runtimes.

Uncontended acquire-release atomic operations are basically free on Apple Silicon, which synergizes with the Objective-C (and Swift!) runtimes, where every retain/release is an atomic increment/decrement.

https://web.archive.org/web/20201119143547/https://twitter.c...

    > Uncontended acquire-release atomic operations are basically free on Apple Silicon

While I don't doubt you, the poster, specifically, how is this possible? To be clear, my brain is x86-wired, not ARM-wired, so I may have some things wrong. Most of the expense of atomic inc/dec is "happens before", which essentially says before the current core reads that memory address, it will be guaranteed to be updated to the latest shared value. How can this be avoided? Or is it not avoided, but just much, much faster than x86? If the shared value was updated in a different core, some not-significant CPU cycles are required to update L1 cache on current current with latest shared value.

EDIT:

    > some not-significant CPU cycles

should say:

    > some not-insignificant CPU cycles

JSOC - javascript on a chip

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