The microarch is closed and IBM-specific. However, the ISA is open and royalty-free, and the on-chip firmware is open source and you can build it yourself. In this sense it's at least as open as, say, many RISC-V implementations.
> Verilog RTL for OpenSPARC T2 design
> Verification environment for OpenSPARC T2
> Diagnostics tests for OpenSPARC T2
> Scripts and Sun internal tools needed to simulate the design and to do synthesis of the design
> Open source tools needed to simulate the design
https://www.oracle.com/servers/technologies/opensparc-t2-pag...
You can certainly get Power cores with the VHDL and everything; the most notable of these is Microwatt, and IBM even maintains it. There are also A2O and A2I.
That said, I don't think it's reasonable to expect that a company that put R&D money into designing a high performance chip should give away the store. There has to be some incentive. I'm satisfied that I don't have any unexplained or opaque firmware blobs in my POWER9 chips and the ISA and its internal workings are well-documented. That was good enough for the FSF, and it's good enough for me.
There is a deskside POWER10 machine from IBM, that uses their smaller half-rack server, but it has somewhat limited expansion capabilities.