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Espressif made a decisive shift to RISC-V[0], effectively abandoning Tensilica.

ESP32-S3 was, AIUI, their last non RISC-V chip.

It was announced in 2020 and released in 2022.

0. https://www.hackster.io/news/espressif-s-teo-swee-ann-confir...

Xtensa is a dead end, they said so on ESP32.com when someone pointed out the FPU ABI bottleneck

I'm sure you're right. The current s3 chip is based on Xtensa, but it was released in 2020, so I guess the OP's statement is correct.

Edit: dead end for espressif.

Still gonna be in a bunch of DSPs and stuff

From the link

>Espressif Systems (SSE: 688018.SH) announced ESP32-C5, the industry’s first RISC-V SoC that supports 2.4 GHz and 5 GHz dual-band Wi-Fi 6, along with Bluetooth 5 (LE) and IEEE 802.15.4 (Zigbee, Thread) connectivity. Today, we are glad to announce that ESP32-C5 is now in mass production.

This wording is ambiguous- it's the first to support 5GHz, but it's not their first RISC-V core.