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Comment by fidotron | Hacker News Reader

I think the irony of this is the MIPS processors weren't that good for very long at all. (Famously Toy Story was rendered on SparcStations, even if the animation was prepared on SGIs). The PA-RISC ones seemed to have the most staying power, but many people don't view HP 9000 as sexy in the way SGI was.

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The PA-RISC processor are really cool - the C8900 has a 64MB external shared L2, and a 768KB I & D cache per core. That's more I & D cache than any modern processor I am aware of, and more last level cache than basically anything but an AMD X3D or the last 5-10 years of X86 server chips. It's much slower of course than any modern cache.

The older 8500 has an article available with a die shot: https://ardent-tool.com/CPU/docs/MPR/19971117/111505.pdf It's like 75% cache even back then. (Fast SRAM With Integrated CPU is extremely accurate, lol).

> The PA-RISC processor are really cool

I'm glad someone else thinks so!

There's a very interesting vid about the design of the ISA here https://www.youtube.com/watch?v=C53tGHzp1PI and I think it's pretty clear they learned from early MIPS/Sparc. It's a shame it got abandoned in the Itanium push.

The Alpha was also a performance king in that era, but tbh I don't have the same nostalgia for it, although clearly it was executed very well.

(author) You can also count me in that list - working on a PA-RISC system was my first job out of college. I found the ISA very clean and they were strong performers. How HP got the wrong idea about VLIW, I'll never understand.

That's cool you worked on a PA-RISC system as a job! The ISA seems clean and the later superscalar designs were very advanced for their time.

I think an updated PA-RISC design be awesome for modern workloads; huge caches with prefetch, a good branch predictor + a 8-10 wide dispatch, and some sort of vector extension. A Mix of AMD Zen+X3D & Apple ARM. To be fair, ISA doesn't matter as much really these days, any core with similar features probably would perform well.

There's always someone who thinks VLIW or a similar is a good idea. So far that's been a bit tricky for a general purpose CPU, or even some parallel designs.

* 100% personal opinion, I've never actually worked on HW design directly *

> 768KB I & D cache per core

PA-RISC has mostly always had large L1 caches ( that used to be off-chip), and usually no L2 cache.

I know this bit of trivia, but I don't know the technical reasons/trade-offs for it.

On the other side, turns out both Playstation (1) and Nintendo 64 did quite well for quite long.

PS2, as well. But games and game hardware tend to have very different CPU requirements than general purpose workstations.

The N64/PS1/PS2 (and others) weren’t exceptional for very long, if ever, in terms of CPU power. They relied on dedicated graphics hardware, low price, ease—of-use, a business model that allowed for selling the base hardware at a loss, and devs optimizing for a fixed platform to stay competitive for 5-10 years as PC hardware improved.

I seem to recall the CPU in the N64 was specced to be something like 75% of the performance of a Pentium 90 but for 20% of the price. The PS1 doesn't even have floating point. When the PS2 was released it felt like x86 was advancing faster than ever, so whatever impressive performance edge it had lasted for about five minutes.

In all cases it's hard to argue that MIPS devices were sold on the strength of their CPUs from the mid 90s onwards.

N64 was effectively Indy, but priced into a game console. Its devkit was an Indy (at first) even.

> N64 was effectively Indy

Not really, no. The memory system and graphics systems are completely different, and the CPU is a different MIPS processor to one in any SGI desktop. Some devkits did involve having whole subsystems on expansions in Indys though.

It should say something that when the Indy was announced the quip was "It's an Indigo without the go" so even had the N64 been Indy based it would not have been noted for CPU performance.

> I think the irony of this is the MIPS processors weren't that good for very long at all.

AFAIK SpecInt and SpecFp would like to politely dissagree. /s

Didn't PA-RISC lead MIPS, and everyone else, on those? When the already-obsolete machine being discussed in the OP was finally marketed in mid-1996, its int/fp socres of either 8/10 or 9/11 depending on the clock speed were not great compared to the available PA8000 workstations that scored 12 on SPECint95 and 17 on SPECfp95. People bought SGIs because there was some critical app they needed that was only available on IRIX, and they tolerated the bad CPU performance because they didn't have a choice.

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