Microbenchmarking Chipsets for Giggles

I've done a good chunk of microbenchmarking with JMH [1], and I have come to the conclusion that I really hate writing and evaluating microbenchmarks. I don't think I'd do it for "giggles". I hate having to figure out if my tests are accurate or if I accidentally ended up only testing a noop. Back before I really understood how async libraries worked, I spent an embarrassing amount of time trying to figure out why my clocks were giving inconsistent results, only to eventually realize that I wasn't testing the performance, but instead testing when Vert.x decided to schedule the next task.

I still do it, because ultimately I find like 90+% of optimization ends up just being clever ways to reduce latency on modern computers, so knowing which methods incur the most latency still has value. Some day I'm going to figure out a way to do this without directly measuring things and without looking at a stupid graph ever again.

[1] https://blog.tombert.com/Posts/Technical/2025/03-March/Micro... Sorry for the shameless plug, just showing what I've done. I have done, much much more since then but I haven't gotten around to writing them up in a post yet.

why is the download button for the image where x button normally is

USB latency and jitter would be useful.