> Upon receiving a fourth Setup transaction, the DMA base address gets reset to its starting position before writing, akin to a ring buffer mechanism.
> After writing each received packet, the controller increments DOEPDMA by the size of data written. The reset operation is implemented by decrementing DOEPDMA by 24.
> The core issue arises because the controller also accepts smaller packets (though always stores in 4-byte chunks).
> Since the pointer increment does not match the fixed decrement amount, we end up with a buffer underflow primitive in 12-byte steps.
so the problem is directly in the hardware, not in driver
what kind of defense would work against such bugs?
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wait, am I understanding it right that DMA access was given directly to the stack??