Autoregressive Language Model on the 6502 Processor

the banking was done via an external ram controller whose bank control register was mapped to some (unbanked) controller address.

You could buy a board called Integra-B to expand a model B.

https://www.youtube.com/watch?v=lT07uPRRPfU

A few games required some extra RAM.

Update: Actually, there were other boards. I remember one particular advert for a board that could handle 256KB of RAM/ROM. I'm now actually curious if adding too many ROMs would make the * commands noticeably slower (the OS would look for the commands in the ROMs, one by one, until it found the code to handle them).

Banking RAM is most simply done by physically wiring RAMs in parallel and routing Chip Select/Chip Enable pins individually from GPIO. People were doing it in PDAs until late 00s. Also, I/O ports on these old machines and CPUs up until switch to PCI Express were philosophically just DRAM slots in alternate shapes, so RAMs could be more or less simply installed and RAMs on adapter cards just accessed. This is also technically applicable to PCIe from various perspectives other than performance.