I'm not even sure inspection and quality control is done at the fab.

At least with logic ICs, they either testing/QC/bining as part of packaging (before dicing), or even have factories that specialise in just testing/QC/Binning. Such fallacies need to be flexible enough to deal with thousands of different IC designs, and there is no reason to tie them to a given process node.

I guess with memory, there are only three-ish designs (DDR, LPDDR, HBM), so maybe it does make sense to integrate testing/QC/binning into the fab.

But I doubt they would have any trouble switching it out.