Basic ALU operations like +, -, &, etc., run on the exact same ports, so timings are only affected by the shape of the expression. The number of operations is small enough that suboptimal uop-port allocation and register pressure shouldn't occur, so the externally observable outcome depends only on formal latency and throughput (i.e. the height of the tree and the number of nodes, since all the ops except for fp- have the same performance characteristics).

Cache is technically relevant on cold paths due to constant loads, but the number of constants is small enough to fit in a cache line regardless of whether there are two or three of them, so that point is kind of moot. Decreasing the number of constants is still worthwhile, but it's less of a priority than improving timings, and there aren't enough degrees of freedom for multiple algorithms with the same latency/throughput, but different number of constants, to exist.

No offense intended, just wanted to leave this here if someone is interested.