You’re kidding right? That’s not what the support matrix on the Zig site shows. Plenty of CPU archs in Tier 3/4. No support for Alpha, HPPA, M68K, Sparc, or SuperH.
Zig has its own compiler backend. With limited arch support of course. Only used in debug modes for now.
I think the most interesting part is they rely on WASM for bootstrapping so all you need to make to bootstrap Zig anywhere is a WASM interpreter (if I understand correctly).