Show HN: Run xv6-riscv(64Bit,MMU) with RP2350

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I have successfully run a 64-bit version of xv6-riscv—which includes an MMU—on the Raspberry Pi Pico 2W. No PSRAM is attached. I built a software emulator and ran it on the Hazard3 core. (It should likely also run on the Cortex core.)

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From the repo:

This is a lightweight 64-bit RISC-V software emulator and bare-metal port designed to run xv6-riscv within the limited SRAM capacity of the RP2350 (Raspberry Pi Pico 2).

It emulates virtual memory based on the Sv39 MMU, a 16550 UART, CLINT, PLIC, and a VirtIO block device (for disk I/O) with a sector cache. This enables the full execution of user-mode processes, including a shell (sh) and various user utilities (such as ls and echo). ---

Pi Pico 2W is ARM+risc-v. Hazard3 is rv32 without s-mode.

This does not mean that xv6 is running directly; rather, a software emulator has been built to emulate privileged mode, the MMU, and 64-bit registers, and it is this emulator that runs on Hazard3. In other words, xv6 is not being executed directly.

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