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Please yes. I had hopes for Lava (1) but haven't heard much about it since I first read that page. The author might still be in the space? (2)

1. http://raintown.org/lava/ 2. http://www.cs.bham.ac.uk/~singhsu/

There's Chisel (Scala based) the LowRisc team from Berkeley are using[1]. It can output Verilog and also compiles to cycle accurate simulators.

There's also PSHDL from Karsten Becker[2] at TUHH. It's immature and seems to be focused on teaching at the moment.

[1] https://chisel.eecs.berkeley.edu/ [2] http://blog.pshdl.org/

Hi, just a quick correction - the Berkeley RISC-V team are not one and the same with the lowRISC team. We collaborate with them, and we have Krste on our technical advisory board. We are of course also using Chisel though.

A higher-level language like BlueSpec's [1], or something more specific?

[1] http://www.bluespec.com/high-level-synthesis-tools.html

I have zero experience, but MyHDL[0] seems interesting. No idea if it's close to solving any sort of practical problem though.

[0] http://myhdl.org/

This would be awesome. God I hate VHDL, I don't have enough time to hate it.

I am using MyHDL for sometime.