The world would have been better off if the 68k architecture had won back in the 80s.
Eh, not sure I buy that. Since at least the Pentium, x86 implementations have had very fast stack variable access compared to contemporary RISC architectures, practically treating some number of bytes around the stack pointer as registers. As Linus points out, everyone architecture has to confront this problem anyway sooner or later because some stack access is unavoidable; the x86 implementers just had to confront it sooner because of their ISA had half or less of the registers of the RISC architectures. So while of course it's better to keep everything in registers if possible, I'm sure that the old Lisp compilers would have performed reasonably well on x86 if they'd tried instead of throwing their hands in the air and saying "we can't do it!"
And the "anisotropic instruction encoding" makes so much sense that ARM adopted it (in a much simplified fashion) with Thumb-2. Fixed width instruction encodings waste a lot of space because the common operations need 2-3 more bytes than they ought to, and because absolute addresses and constants above a certain size must be loaded from an indirect access to a location close by the instruction stream, instead of just being inline with the instruction. Instead of 1 byte of instruction + 4/8 bytes of data/address, you get 2-4 bytes of instruction including relative address + the 4-8 bytes of data you wanted to access in the first place. All this adds up after a while, and at some point, the waste of code cache hurts more than the more complicated ISA.
I love 68k too (which had a somewhat "anisotropic instruction encoding" itself, by the way), but let's give credit where it's due: it took a lot of engineering talent and confidence ("RISC is the future!") for Intel to prove that CISC chips could beat RISC chips on performance. It might have never been possible for Motorola to overcome their management problems and infighting to progress 68k at the zenith of RISC hype.
And then abandoned it in their 64-bit architecture in favor of the old uniform 32-bit, FWIW.
I think MIPS is a good example of how trying to make a "dumb and simple" architecture to cater to compiler writers, with the promise of cheap, tiny, and fast CPUs that required far less effort to design for the same performance, didn't work out so well:
http://www.extremetech.com/extreme/188396-the-final-isa-show...
On the 2nd page of that article are the interesting results, and there's also this odd sentence: "Loongson also struggles, possibly due to poor compiler optimization."
...but isn't MIPS supposed to be one of the most compiler-friendly ISAs, with a very orthogonal and large number of registers (32!), and a uniform instruction format? In many compiler courses it is the "model architecture" of choice for its easy code generation and "better performance", but in the real world its only real advantage seems to be being small and cheap - and ARM, which is a bit more complex, is not far from it but surpasses it easily in efficency.
And I'm especially confused at the idea of an architecture with explicitly asymmetric registers being so much of an improvement that "the world would have been better off". I can see that argument being made over MIPS, I guess. But not 68000...
-edit: left out not :)
Maybe, the denser x86 instruction set helps more than the its complex instruction decoder hurts. Now that CPUs with a billion transistors are 'small', that decoder doesn't look that large anymore.