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Comment by qwerta | Hacker News Reader

We were investigating CPUs for embedded use. I am not sure right now if it was RISC or MIPS. The performance was fraction of ARM or x86. But the consulting company would build SOC exactly to our spec. There were zero licensing fees.

So for embedded use if performance is not important, I would seriously consider it.

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Reading the article, I see no reason why there should be any major performance issues inherent to RISC-V. Lack of an ecosystem looks like the issue, at least initially. But a $1m licensing fee for a CPU with an established ecosystem is an issue too...

The reason the chips will be slower in practice is because they are produced in small batches, and need to be produced by smaller fabs and by extension much older process. MIPS is routinely produced at 95nm still.

MOSIS offers multi-project wafer (MPW) runs at 28nm from GlobalFoundries.

https://www.mosis.com/products

We at lowRISC intend to produce in volume at 40nm or 28nm. http://www.lowrisc.org/

Looks really interesting. Where are you guys based? Cambridge, UK I'm guessing?

Yes, the core team is based in Cambridge, UK. However we do intend to be a truly open-source project, with an open and distributed development process which would involve arbitrarily geographically distributed third-party contributors.

That's truly great to hear!

Yes, and the fact that most of the performance comes from the micro-architecture.

CPU design is all about the tradeoff between size, complexity, speed and power consumption.

New RISC architectures tend to start on the low-end of the scale (clean architecture, short pipeline, small die), and if they are successful, move toward the x86/ugly/big/complex/fast spot.

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