Hardware and Firmware Issues in Using Ultra-Low Power MCUs
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To add to it, don't use zener diodes for over-voltage protection. They are extremely leaky. And if you need high value MLCC capacitors you are better off making them yourself from a stack of (more common) 10uF ceramic caps.
One way to look at it is the power in cmos gates is all burned up fighting capacitance. You can run a cmos ram in sleep mode for years off a watch battery, but they'll take "serious" power at MHz speeds.
Think of charging a capacitor and watch the voltage across the cap as it charges. As electrons trickle in (thats the current) the voltage slowly rises. It'll take longer to charge that cap up to 5 volts than 3.3 volts. (edited to add, next step in analogy is you could make that cap charge up to 5 volts just as fast as it charged to 3.3. volts by cranking up the current...) So by analogy in your cmos gates the higher the voltage you charge a binary one up to, the larger the current spikes to get to that voltage representing a binary one.
There are resistive losses, but not much. Those are positive resistances, too.
So everything comes up positive resistance aka "higher voltage = higher current" not the other way around.
V = IR
That, in a word, is why. The DC circuit can be modeled as a bunch of resistors, capacitors, and inductors. Capacitors and inductors are more complicated than resistors, but similar.Intuitively, voltage is the ability to force current through the devices. Reducing voltage reduces ability to force current through.
Your notion of dropping voltage increasing current is probably rooted in power. Perhaps you are thinking about AC transformers, where halving the voltage does lead to doubled current. You can think of a transformer as playing with this equation while maintaining static Power:
P = VI