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Comment by rasz_pl | Hacker News Reader

It all started with this:

https://www.youtube.com/watch?v=nbNnNF9JHFQ

http://www.theregister.co.uk/2012/05/03/unsung_heroes_of_tec...

ARM low power consumption was an accident caused by financial constrains. Small team with no money (Acorn was starting to go downhill at the time) forced Sophie Wilson/Steve Furber team to be clever with resources.

In 1987 hand routed ARM2 build with 30K transistors ran at 8MHz reaching 4 MIPS (of 32bit operations). Coincidentally Intels 386 build by an army of hundred engineers supplemented by state of the art emulation/validation/automation software (Mossim etc, &) and divided into large groups working on individual parts of the design achieved ... 4 MIPS at 33MHz using 275K 2x smaller transistors and >20x the power.

&http://webee.technion.ac.il/people/kolodny/ftp/IntelCADPaper...

&software born from https://en.wikipedia.org/wiki/Mead_%26_Conway_revolution and following Darpa programs

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I don't think that is a fair comparison. The 386 was a true CISC design while the ARM2 was RISC. One of the major points of RISC was to reduce silicon complexity by using a less complex design (and shoving the complexity onto software).

Intel could have built an equal or better chip than the ARM2 but they were worrying about servicing the already established market for x86.

P.S. Is it even reasonable to compare MIPS between RISC and CISC designs? A RISC chip has to execute several instructions to do what can be done in one CISC instruction.

Interestingly, there is a thread on RWT that talked about this where Linus Torvalds was involved. It seems that it wasn't until 486DX2 in 1992 that x86 was beginning to beat RISC and even 68040 on the lower end. And remember that 33Mhz 386s did not even arrive until 1989 or so.

This is very true. At that time, even 68K-based workstations ran circles around any x86-based design. x86 was, however, cheap, high-volume and with a lot of compatible hardware, so there was sufficient interest to pour resources into it.

Intel did in fact build a RISC chip contemporary with the 386/486: http://en.wikipedia.org/wiki/Intel_i860

It had great instruction throughput performance by the specs but lacked in real applications, thanks to the sufficiently smart compilers never coming to be.

The i860's theoretical throughput was achievable only in very special cases in tight floating point kernels. Most code couldn't possibly perform as well, no matter how smart the compiler.

Intel's sane RISC was the http://en.wikipedia.org/wiki/Intel_i960, somewhat by accident.

And of course, by the time we got to the Pentium Pro - and more or less everything ever since - we ended up with a hybrid pipelined superscalar design which takes advantage of the legacy of support (and, compared to VLIW, tight instruction coding), but as part of the decode pipeline, translates that to RISC µops inside with microcode.

The Transmeta Crusoe was a particularly notable (if not particularly successful) case in point, which brought that layer a little more visibility than most, although in all honestly, was probably mostly well-known for having been Linus Torvalds' employer.

There never was a particularly bright line between RISC and CISC, and it's only gotten blurrier with the decades as the two paradigms stole good ideas from each other.

That's not to say there isn't the occasional throwback, sometimes for a good reason. I've got an adorable little slug of a 'transparent' microprocessor on my desk which I hope sees the light of day sometime (when it actually works, because I've bricked it - first time designer == way too many errata! :P) because it's got some fun ideas for trust, like the host being able to directly read (and verify) all the software it's running.

i960 was actually a very nice architecture. It had features like proper memory protection, hardware GC support and others that we would absolutely love to have in this day and age.

It was a successor to the Intel iAPX 432 architecture. It also had shades of Burroughs B5000 in it (only RISC). I would love to see a successor to this. Heck I'd like to just have a development board to play with.

risc with multiply and add instructions :)

The other reason it isn't a fair comparison is Intel didn't get to start with a blank sheet of paper. The 386 had to run code written on the 8086, before anyone expected home computers to support protected mode kernels. I'm sure the x86 silicon Intel produces today would be quite a bit more efficient if it didn't have to support applications written 30+ years ago.

Amusingly, Intel have been marketing a 486 as their Internet of Things solution, in the form of the Quark CPU used on the first Intel Galileo board. It's been augmented to support the Pentium instruction set and ported to a newer process node and bus, but architecturally it's a 486. It's about as competitive as you'd expect a 486 to be against modern ARM designs - not very.

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