Power consumption of DRAM is high, what are you talking about? DRAM requires constant refresh -- the whole reason DRAM can be high-density if because it is a 1-T cell with a trench capacitor -- but the capacitor needs to be refreshed on a synchronized basis (hence SDRAM) -- that was the big innovation.

And yes, array size affects latency but so does the underlying process technology (much more so across technologies).