tcas

I would consider using it anywhere I would be looking at CNC-ed metal, especially for one off parts/prototypes. A lot of the cost of CNC is programming and fixturing, which 3D printing technologies save.

Other 3D printing technologies is already well into this territory. I've used companies like Sculpteo and Xometry numerous times for professional 3D printed parts in various technologies (mostly SLS nylon). The per unit cost is more than having a Makerbot running in an office, but the quality is way better. Even for FDM sometimes I prefer to have someone else make the part.

I can imagine those companies buying these machines and passing on the cost savings -- I would definitely start to think about using it instead of CNC.

I've hacked around lambda quite a bit (I think the compressed size of one function is a tad under the max allowed). My hacks I remember are:

- Run strip all .so libraries -- many aren't stripped fully

- In Python I manually deleted sub packages of numpy/scipy I didn't need

- If you're loading large models at initialize, numpy load routines are _much_ faster than cPickle. Have it load at module initialization, not during each invocation.

I should really write a blog post about my experience with it.

At a certain point I decided I was doing something that lambda really wasn't designed for -- I'm looking at migrating off, but the current implementation makes capacity planning super easy. Provisioning 1000 machines with 1GB of RAM for 15 minutes every day to read off a queue isn't a trivial problem.

(Also, if anyone from AWS is reading, being able to limit the max concurrency of a single function vs account level limits would be super useful).

Those are "preferred" seats. They're usually windows and aisles close to the front of the plane. They are released to everyone once check-in happens.

They save them pre-checkin for status holders (people who fly 25,000+ miles a year typically). As someone who flies _way_ above that number I appreciate that they do, as I am typically buying last minute tickets (less than 2 weeks out) that are much more expensive. Those seats mean that despite paying more than most people on the plane, I'm not stuck in a middle seat most of the time.

That benefits attracts people like me to try and stay loyal with an airline rather than going with the lowest bidder. I'm willing to bet that people with similar flying habits to me provide the majority of profit for an airline as well.

Well, many chips can be recycled (desoldered and resold), meaning you can buy "expensive" chips for really cheap.

This is what a setup for testing airplanes for EMP tolerance looks like: https://en.wikipedia.org/wiki/ATLAS-I Note that this isn't used anymore.

And here's an anechoic chamber for testing military craft: https://en.wikipedia.org/wiki/Benefield_Anechoic_Facility

Now I'm curious to see an A380 in an anechoic chamber... Are full airplanes normally tested in a chamber? Or only the individual systems?

Hopefully this will allow them to take on smaller clients -- we've wanted to start to move some of our shipments from air to sea, but unless you're shipping multiple containers a year they don't have capacity for new clients right now.

There doesn't seem to be a great solution for trying to save money when you're shipping only a few thousands KG a year.

I believe virtual machines will typically alter the CPUID a bit: https://tech.mendix.com/linux/2016/08/18/xen-cpuid-masking/

You'll choose a lowest common denominator of features sets.

AirFrance does coach on the upper deck -- you might need to pay a tiny bit more to get them, but definitely not the same as a business class ticket.

I highly recommend trying to get a seat up there as well. It has less seats than a regional jet in a coach config, and you feel completely isolated from the chaos below.

It runs at 2x the clock rate as the main chip. So if the chip is running at 2Ghz, the ALU is running at 4Ghz.

While this might not make sense at the surface (the next stage of the pipeline won't be ready for the data a half clock cycle earlier), you can minimize logic area by doing 2 quick 16 bit operations. Additionally, for some operations that have dependent instructions, for example a super scalar processor executing two integer instructions at once, if you have an ADD that depends on another ADD, you can forward the result from the first cycle on the first ALU to the second cycle on the second, although I'm not sure if this is actually done.

Another case where this is useful is if the result of an ADD operation needs to be used on a LOAD instruction earlier, you can forward the result a half clock cycle sooner.

I've done numpy, pillow and scipy from scratch. Note that numpy+scipy is too big for 50MB zip file, so I had to prune out various sub packages I didn't need in order to keep the size done.

I do not have the answers for your questions (and I don't think anyone can share actual failure rates), but I would direct you this video which goes over a lot of modern chip fabrication techniques, circa 2009:

https://www.youtube.com/watch?v=NGFhc8R_uO4

It's crazy stuff.

There are wafer test machines which will interface with the wafer directly and do some testing (which are $$$$), JTAG type tests, which access parts of the chip out of band, and functional testing. Some products, like SD Cards actually have a microcontroller on board that will provide the test routines and error correction without the need of an expensive machine. Design for test is extremely important.

I'm by no means an expert however, I mostly deal with JTAG and functional tests.

That's only a list for California, each state seems to have their own laws and might not require disclosure of the companies:

http://cyberlaw.stanford.edu/wiki/index.php/Automated_Drivin...

Semi-related: Has anyone had issues with psql wrapping long lines incorrectly? Specifically it starts overwriting the current line. I'm using zsh on OS X using the default terminal, though the behavior also appears when SSHing to a remote server which uses bash.

I found this: http://stackoverflow.com/questions/2024884/commandline-overw... but it didn't seem to help.

Home solar converters will need to synchronize to the mains power supply like any generator before connecting. The power supply capacity of the grid is orders of magnitude more powerful, so connecting it out of sync will still cause it to sync, however, it most likely won't be pretty. Once it's connected, the grid will force it to stay in sync.

Here's a video of a generator who's synchronization system is being "hacked": https://www.youtube.com/watch?v=fJyWngDco3g Although the article doesn't mention it in specific, that's what the comments say is happening.

We were in the middle of a large infrastructure change starting at 4:30am this morning, including taking our application offline. I'm very thankful that we did dry runs along with timing how long certain operations like RDS restores should take and planned for abort steps in case something goes wrong.

We noticed that RDS and ElastiCache backup and restores were taking much longer than expected, and once the first set of errors about Dynamo DB came in we decided to abort and try it again at a different date. An hour later we got notifications that RDS was having issues as well. I'm disappointed that it takes so long to update the AWS status page when things aren't working properly.

Having a fast malloc less compression library is extremely useful in resource constrained embedded systems world, where either memory usage should be minimized (you can still run modern Linux kernels on systems with 32MB of RAM, probably less), or where traditional memory management isn't available, such as a microcontroller.

In the microcontroller case you can get a 32bit ARM Cortex M0 for $2.00 qty 1 these days, allowing the bit-twiddling you find in compression libraries to compile successfully. Having a fast malloc-safe compression library is extremely useful. lz4 is an example of one which you can run on a microcontroller successfully, but isn't as compatible as zlib is.

Very cool, undersampling of color still exists in modern codecs, if you see something like YUV420 that means there's 2 chroma (color) pixels for every 4 luminance (brightness) pixels:

http://i.stack.imgur.com/U7hxZ.png

Since our eyes are more preceptive to detail rather than absolute color, you can lower your bitrate without perceived video quality.

As far as I know you can do stuff like dynamic linking the right libraries as needed, or use different code paths / function points / virtual functions for those instructions.

Linux on ARM used to have an ABI called OABI which would assume the CPU had FPU support, in case it didn't the kernel would catch the exception, perform the FPU operation in the kernel and return the result back to the program. This ended up being incredible slow however, with performance penalties for hardfpu machines as well. The new ABI (EABI) requires that the binary be built either for soft or hard float, which no longer requires the kernel to get involved.

I'm guessing it's because the charging cable is fairly thick, making bending it arbitrarily fairly difficult. This design will make sure that the cable isn't too strained while integrating it as one piece.

You can definitely solve the problem using a traditional arm though -- so maybe it's just for the cool factor for now.

Yea, the switch from auto-complete to company mode was annoying to get done right, but was well worth it in terms of accuracy. It also provides function signatures which my old setup didn't. I also switched to using virtualenv mode as well.

I can probably try and dig up the relevant part of my config, but since I'm using prelude as a base now it mostly just works with only a few lines of tweaking in my personal.el -- mostly just virtualenv locations and enabling virtualenv mode with a hook.

I just tried this example, since anaconda-mode + company (which uses jedi) has been really good for me, it doesn't show variable1 for me.

http://imgur.com/4l6Otvt

I used to use the auto-complete package instead, which in some configs (with ac-source-words-in-buffer or ac-source-words-in-same-mode-buffers in the source list) basically tokenize the buffer and provide autocomplete on all words.

I think many PCB fabs will say they can do it, the question is how much they will charge. 75 micron drill is crazy.

I think almost every FPGA is like that -- I think ones that have internal flash (like the Spartan-3AN) are still SRAM based and just have a flash chip in the package as well.

The only flash based programmable logic from Xilinx/Altera are CPLDs as far as I remember.

External SPI flash is pretty cheap even at low quantity (~$0.50 at qty 1 for 2Mbit, going down to the $0.30 range for low thousands)

Are there any open source map platforms like this for integrating into real time data feeds (i.e. if we want to track sales by region etc...) onto a map?

I know about http://cesiumjs.org/ but it was extremely resource intensive heavy last time I tried to use it.

EDIT: it looks like they use http://leafletjs.com/ -- looks interesting

I'm not sure why you were down voted to begin with, it's a valid question seeing how old many of GA engine designs are and how reliable modern internal combustion engines are. There's tons of advances in engine technology that isn't ported to GA aircraft for a lot of reasons, the biggest I would say is cost of FAA compliance and the insurance liability of failures. If your car engine fails on the highway you can still come to a safe stop. It's an extremely unlikely thing to happen on a modern car, but it's still possible (e.g. a cable is loose and disconnects the ECU). If your aircraft engine stops (which is also extremely unlikely, given the amount of routine maintenance it goes through to be considered airworthy) in the wrong phase of flight you're going to crash and possibly die.

Every plane you fly in commercially has at least 2 extremely reliable engines, and each one is certified to be able to handle flying the entire plane safely for an extended period of time to make it back to an airport in case of failure. The certification is called ETOPS [1], if a plane has 90 minute ETOPS certification it cannot fly more than a 90 minute flight from an airport. This appears to be a low-cost method of having a couple of minutes of safe controlled flight in case of a failure, that difference can make the difference between life and death for a GA plane.

This reddit thread has some good responses as to why Honda (who probably produces more engines in a month than Lycoming has in decades) doesn't make GA engines:

https://www.reddit.com/r/aviation/comments/1lxlco/why_doesnt...

[1] https://en.wikipedia.org/wiki/ETOPS

The flat, non tactile buttons make cleaning much easier, a big plus in my book.

Commercial microwaves typically only have a few buttons as well:

http://www.webstaurantstore.com/solwave-mw1000t-stainless-st...

I think it was just lowering the number by a few orders of magnitude to compensate for the effects and logic propagation delay (e.g. I think he said he's using a ripple adder which has a critical path dependent on the bit length), not a precise calculation exact number. My gut instinct says it's probably the right order of magnitude though.

You could probably run the long stretches at a much higher clock rate or make the design run on asynchronous clock domains if you use good serialize/deserialize units.

With extremely long unshielded parallel cables you're going to tons of cross talk and other emissions that will cause bitflips / errors.

In addition at 33Mhz the speed would be (using speed of light instead of calculating velocity factors):

  (the speed of light * 1) / (33 mhz) = 9.08461994 meters

per cycle, which isn't taking into account the capacitive load of the wire and registers at the other end (which will act as a big filter). You need to meet some sort of timing constraints in order to count for clock sync issues etc...

Modern CPUs can run faster since the capacitive load of a transistor is extremely small (since they're nanometers in size), plus the loop sizes of the interconnects are extremely small, lowering EMI emissions.

It's probably easy for Intel to reclassify the processors since Amazon probably provides the exact thermal conditions they will be in. If you say that the CPU temperature won't exceed X degrees due to the cooling systems, you can push the core clock speed higher.