The cache is a shared resource, so I'm not sure how you would propose to "handle it directly", other than literally having a MMU/virtual memory layer on top of it, and try to provide some guarantees about coherence. But given how small it is, without allowing for hard pins, I suspect that the entire cache would be thrashed pretty badly across processes and it will just degrade back to what happens today; it's useful/coherent for short/co-located bursts and not much else.