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ARMv7 works on deferred consistency between cores and memory. So, even if the write itself is "atomic", which should rather be called tear-free, there is no inherent synchronisation of writes and reads to the same memory location.

C11 and C++11 atomics also guarantee ordering depending on the memory model parameter.

Look up Sutter's talk titled "Atomic Weapons" for more detail.

Interesting talk! Here's the link: https://channel9.msdn.com/Shows/Going+Deep/Cpp-and-Beyond-20...

> and thus be out of sync

The operation is still atomic. You will not get a partially written word size value.

https://lagunita.stanford.edu/c4x/Engineering/CS316/asset/A_...