Today's cutting edge fabrication of multi-core chips makes it quite unlikely to get many dies to manufacture where all the CPU's are working at high speeds. Chips must run at a single frequency, so the slowest frequency is the bottleneck. If you fabricated 32 cores, and 1 fails testing, the chip is garbage.
So the strategy is that the chips are fabricated with 32 cores, and then they speed-test the cores and take fastest 24 cores. The remaining 8 are fuse-disabled, and the end user sees a 24 core chip.
Note this strategy also allows them to produce a 16-core chip with the same die, if for example only 20 cores work at high speeds.
So you get both high yield and high speed chips.
[1] https://news.ycombinator.com/item?id=12351729
http://www.nextplatform.com/wp-content/uploads/2016/08/ibm-h...
We had to test against the OSs we'd since dropped support for, which included HP-UX, AIX and s390.
The first time I heard someone mention a "31bit" build, I thought they were taking the piss :P It just seemed so odd at the time...