So, it is getting closer than ever before, but we're still quite far to closing the gap.
The T2 security coprocessor in the Mac -- a minimalist ARM implementation to manage a few very specific parts of the Mac -- does HEVC encoding (e.g. dramatically more complex than decoding) thirty times faster than the Intel chip it sits beside. I can't say it's a 30x faster chip, however.
High TDP Intel chips definitely are much more powerful than Apple's A-series chips right now. It will be interesting to see what Apple can do with a larger power profile and active cooling, however. That's theoretical, but they should have an enormous amount of headroom to exploit.
It happens to have hardware acclerated HEVC encoding.
I did once throw a photo of a mac motherboard into an image editor and estimated the T2 package dimensions. They were a very close match for the A10 Fusion, within the margin of error.
Clearly Apple copy-pasted their core, but the T2 serves such a novel purpose in the Mac, and has some unique performance requirements, that it seems very unlikely that they sourced it from the A10 reject bin. Much more likely they simply used of their ARMv8 cores with some custom IP particular for the Mac as they slowly moved the line to ARM. This is all just speculation though.
Tapping out a new SoC design costs Apple hundreds of millions of dollars and years of engineering time. Reusing those pieces of A10 silicon that had defects effecting only part of the chip is essentially free.
Every other SoC/CPU manufacture does this, sells the same piece of silicon at different clock-speeds or with half the cores disabled. The fact that apple typically doesn't do this binning actually puts Apple at a disadvantage cost wise.
> but the T2 serves such a novel purpose in the Mac, and has some unique performance requirements
Sure, but the performance requirements are all a subset of what the A10 can already do. There is no need for a large GPU like the A10 has, the T2 only drives a tiny, low animation display. Yet the GPU takes up ~35% of the A10 die. There is also no need for such powerful CPU cores.
If apple were designing a custom SoC for inclusion in Macs to meet those requirements, it should logically be much smaller than the A10.
Yet we have this T2 chip which is basically the same size as the A10.
When Apple moved to the T-chips they also moved several system management chips to it as well (e.g. copy-pasting the design alongside the A10).
Software on a general purpose CPU is great, but it simply isn't nearly fast enough for many system management functions. For >4GB/second DMA to go through it (for security oversight, encryption/decryption, etc), for instance -- that simply eliminates it from being a binned A10 at the outset, which was never designed around such a high performance need. The specialized display controller for the touchbar is absolutely nothing like the very purpose-developed display controller in the A10, either. These are all differences that would make it a terrible hack for them to use an A10.
Until we have imaging of the T2 innards we can't say, but I'd say with 99.999%+ certainty it is simply not possible for it to be a binned A10. An A10 single core integrated on some new IP (with purpose-suited blocks that perfectly fulfill their roles concurrent with the general processor), sure, but not an A10.
I have wondered whether they should be using the GPU in the A10/T2 too, instead of the Intel integrated graphics. Would probably perform rather well!
My only point is that assuming Apple makes the best low power CPUs should not necessarily imply they can make good high power CPUs. They may have to build up the competency over time just as they did in the initial iterations of the A series.
I disagree. SIMD can be used in numerous cases, and not only in games/video. And to the end user, it does not matter which part of the CPU/GPU is used.
SIMD instructions aren't the difficult part of matching Intel's CPU architecture. Fast cache hierarchies, prefetching, branch prediction and out of order instructions etc. are the parts that have to be matched.
Plus a sane ISA extension strategy that actually gets people to use your SIMD instructions helps a lot (Intel hasn't done well here, but so far neither has ARM e.g., with almost non-existent support for SVE).
SIMD performance is one place that Intel is still fairly far ahead of both AMD and the ARM competition (with Apple far out ahead in that group).
I happen to agree with the GP that comparing SIMD accelerated to not can give a misleading picture, and so deserves to be noted - especially when one party has relevant SIMD instructions but they weren't used for some reason.
I remember people whining in the 90s x86/Alpha/POWER comparisons that some compilers were aware of fused Multiply-Add operations, too, but everyone who was trying to make a purchasing decision just tuned them out since they wanted to know realistic FLOPS/$ ratios.