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I think the masks can take it but their is a ton of difficulty in inspecting the masks themselves for defects. IIRC the leading candidate at the time I was in the industry was to actually expose wafers and then scan the wafers for defects which originated on the mask, hoping to not confuse these with other process defects. Not sure how they ended up solving that one.

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Not just that but high throughput pellicles (prevents dust from ko-ing you) haven't hit production yet iirc

Do multiple exposures and see which defects come up more than once?

Yeah - typically print the entire wafer then compare dies within a field (usually there are multiple dies exposed in a single exposure) to see which defects are in the same place on each field. This won’t work if there is only one die per field, as could be the case for an exceptionally large server chip. In that case you probably need to predict what the image will look like based on design files and then compare with the actual image and look for differences. You could also e-beam scan the whole wafer but this can take a while (like 30 days when I was around), night damage the wafer, and bumps up against the reliability of E-beam components. It wasn’t being seriously considered.

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