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Comment by karmakaze | Hacker News Reader

Special register groups sounds like Hyper-Threading Technology. Didn't realize that Honeywell had it in 1959.

I'm not knowledgeable about CPUs but as someone who switched careers from one tech (networking) to the next (web development) it's amusing how many approaches to problems are found, resused, not used found again, redeveloped and etc.

I'll find an excerpt from a book from the 1980s someone will post and while on its own I might not grock it I'll hit an issue in React a while later and ... oh I get it now even if the technology is different, the problems and strategies seem to be somewhat natural / recycle.

It's not really similar to hyper-threading. You still just had one thread of execution, you just didn't have the overhead of pushing CPU state to working memory (RAM) on context switch. Hence the CPU could switch contexts on every instruction instead of much more rarely like modern multitasking OSes tend to do.

Reading this I was reminded of the shadow register set on Z80. This CPU has two "special register groups" that could be switched by a single 4-cycle opcode. As far as I remember, the original idea was to have "main" and "interrupt" CPU contexts without the overhead of pushing/poping the stack (which could cost tens of cycles). From what I've seen however, people were mostly ignoring that feature in practice, or using it for various nasty hacks when they ran out of CPU registers.

Nah, this is for sure a form symmetric multithreading (or hyper-threading, Intel's trademark on the technique). Unlike the Z80's shadow register set and like hyper-threading this scheme keeps an independent program counter around for each of the register groups. Doing a thread switch each cycle is pretty common in simpler SMT designs like the UltraSPARC T series, the PPE on the Cell, and the shader cores on PowerVR GPUs.

Here it's just used for fine-grained multitasking-- you need a pipeline and excess resources for simultaneous multithreading. (So that when stuff stalls, on access to memory or data dependency... or e.g. when a program doesn't use the floating point unit... you can use the unused parts of the processor to run another thread).

It’s barrel processing. A modern example is Intel’s Larrabee; it had 32 4-wide barrel processors, each of which could retire one 16-wide vector instruction, one load or store (fused) instruction, and 0-or-more scalar instructions per cycle.

You remind me of this Kevlin Henney talks that manages to cover a rather big range of programming concepts that keep getting recycled as the big new thing https://youtu.be/AbgsfeGvg3E

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