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The toolchain for ASIC/EDA in general is very poor. In 2019 I'm amazed that an open-source HDL simulator is not the de-facto industry standard. The big 3 EDA vendors charge astronomically high prices for simulator licenses, yet Verilog/VHDL along with simulator APIs (DPI/PLI) have been standardized for decades.

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Verilator is gaining traction as the de-facto open-source simulator for industry and hobbyists. VCS is still the sign-off simulator, but at least there’s mounting pressure to support both.

In my day job as an FPGA developer I am using totally open source tools for simulation and verification (the only tool we pay for is Vivado but you have to pay for that in order to build for the FPGA). The simulator is icarus verilog and does the job pretty well. I use cocotb for simulation.

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