The most interesting route is using an FPGA. There are many examples of running RISC-V softcores on FPGAs (for example, Berkeley's RocketChip) and many boards that support a decent amount of memory (even beyond 1 GiB).
The most interesting route is using an FPGA. There are many examples of running RISC-V softcores on FPGAs (for example, Berkeley's RocketChip) and many boards that support a decent amount of memory (even beyond 1 GiB).
I looked at the Xilinx FPGAs--the ones SiFive recommends, but they're quite pricey.
Which FPGAs had you had luck with?
1. https://www.crowdsupply.com/1bitsquared/icebreaker-fpga 2. https://www.crowdsupply.com/radiona/ulx3s 3. https://groupgets.com/campaigns/710-orangecrab
https://www.seeedstudio.com/Sipeed-Maixduino-Kit-for-RISC-V-...
I'm not sure what's the status of programming these from Rust. I suppose that you will probably need to build your own toolchain that links the Seeedstudio libraries.
With Rust, you can do what I did with my OS. It can compile out of the box. The kendryte has a "BSP" (base support package) that is essentially a minimal OS, but it is written in C.
It would be unfortunate to have to re-implement the wifi driver in Rust, but I suppose I'll just have to link parts of the C toolchain instead, creating Rust wrappers, etc.