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I've had something closely resembling what OP described happen to me twice. In both cases the relevant chip errata document is behind an NDA, but in one of them my bug was the first one on the list.

That one was a "don't use these particular memory locations, or disable the cache (which makes the chip unusably slow)" kind of bug, and I'm still simultaneously amazed that I managed to figure it out and angry that I had to.

Been in a similar position too. Didn't end up getting it added to the errata since we reported it against an engineering sample, but just added a sentence about how 'this status bit flag is "unreliable"' buried somewhere in the middle of the first public release of the reference manual without any warnings as to what that implies downstream. At least it went in the real docs I guess. But this was after them ghosting us about this, so the whole encounter still left a bad taste in my mouth.

The NDA problem in the SoC world is completely out of control.

these are the best comments in HNews! It amazing the amount of incompetence there are in tech industry now days.

I'm fine, thanks for asking :-)

It was a specific example, one of many from a vendor that I will not name, and over a decade ago.