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I think you are thinking of different types of tasks. A lot of RTL is brainless, but if you are actually trying to compute with it, it can get tough.

A mediocre C++ programmer can write a (bad) hash table in C++ in a few hours. How fast can you give me one in Verilog?

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You're not writing a hash table in verilog, you're writing a hardware configuration that can hold and manipulate a hash table. It's a different ball game.

I have to make a lot of assumptions, but a couple hours doesn't seem unreasonable for the core function. Among the many assumptions are the hash function, what is actually being hashed, what processor interface is, desired performance, etc.

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