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Comment by FullyFunctional | Hacker News Reader

The presentation has all the answers. It's not MIMD or SIMD; it's an 32x4x8 grid of logically individual SMT2 cores. Groups of 8 shares an I$, groups of 32 shares a D$, everyone shares a LLC and memory interface. There's no divergence, each core is independent.

Don't miss the most important detail: low voltage. By running the Minions at a low voltage, you are reducing performance, but disproportionately increasing the efficiency (up to a point). It's an interesting trade-off of power, area, performance, and efficiency.

Add: it's clearly not indended to drive a GPU, but is presented as an accelerator. They have mentioned that it can also run standalone, thus, can be configured both a PCIe host and target.

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How does low voltage help? I mean, you can lower the voltage to increase efficiency on any chip. Nobody does that because it is a waste of expensive silicon.

Power consumption is a function of the voltage squared, but maximum operating frequency drops down slower than that as you lower the voltage, up to a point as GP said. So efficiency defined as f*P goes up as V goes down.

People definitely do that, the voltage you chose to power your chip is always a consideration, it's one of the variables used by laptop manufacturers to manage thermals, and it's also pretty common to lower the CPU voltage so that you can run a desktop system with passive cooling.

Yeah when I said nobody I meant nobody in data centres. This isn't a desktop chip and there's no point using passive cooling in a data centre.

Anyway my point is that you can lower the voltage on any chip so the fact that this runs at a low voltage isn't noteworthy.

You can't just "lower the voltage on any chip" while preserving timings and reliability. These chips will be designed from scratch to run at that kind of voltage, which very few chips are.

That’s right. For example normal srams don’t work at supplies that low. This is using custom memorizes designed for this.

To the OP: yes this is trading silicon (aka area) for efficiency. That’s the whole point.

So it's like Xeon Phi but RISC-V?

I would compare to a mix of a Xeon Phi and a product like http://www.greenarraychips.com/home/products/index.html but with higher power consumption and a more standard ISA.

What distinction are you drawing between multiple cores and "MIMD"?

MIMD comes as one instructions stream with one instruction counter. Multiple cores have different (independent) instruction counters.

The "MI" in MIMD means each unit has its own instruction stream and counter.

Yeah, you are right.

> They have mentioned that it can also run standalone

I’d love to see this misused as a workstation. We’d need to do something with `htop` though, because showing all these cores would require an insanely tall terminal.

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