what's are the most prominent bottlenecks with lithography?
ASML's monopoly on EUV tools, and their high cost, long lead times and low number of units shipped per year are probably the most significant limitation for leading-edge logic fabrication nodes. But even once you have one or two NXE:3400 tools, you still need at least a few years of R&D before you can get to commercially viable manufacturing of sub-7nm chips. (For example, TSMC developed their own pellicles for EUV rather than relying on ASML for that component.)
I think it's just kinda impossible to start one, it's prohibitively expensive to get the factories and equipments running, and there aren't enough people with the know-how of building and operating these things in the world. Not sure if I understood your question, but I hope so