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Comment by staticassertion | Hacker News Reader

> I regret to inform you that x86_64 (which is probably a “major architecture”) is segmented and has three address spaces.

Can you say more? I assumed the post was referring to segmentation registers, which are not an x86_64 thing.

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amd64 uses segment registers for TLS (such as errno).

https://stackoverflow.com/questions/6611346/how-are-the-fs-g...

Thank you! I love learning about stuff like this but I wasn't sure what to search for. Much appreciated.

hmm i've always just mentally modelled TLS as "yeah the OS slaps a pointer to an array in this one register".

but i guess the difference between "pointer to an array" and "a segment of memory" isn't actually that big?

It’s a funny register: you don’t want to read it (and before Ivy Bridge, user code couldn’t read it). The base is added by the CPU when you dereference the pointer. So code like:

    __thread int array[100];
    array[n] += 5:

Effectively computes the offset portion of array+n and then, using CPU assistance, accesses that memory relative to the segment.

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