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Comment by jfindley | Hacker News Reader

This sounds fairly obviously fake. 128 cores at a TDP of 950W means only ~7.4W per core, which would be a massive improvement on the i9-9990XE - which can only do 5Ghz - and requires 18.4W per core. A tiny, hitherto unknown company with only a handful of engineers managing to outperform Intel by this huge of a margin strains credulity past breaking point.

They also talk about air-cooling four of the 600W model in a 2U chassis! I'm not convinced how possible it is to handle 600W for any reasonable socket size with air cooling at all - the watts per mm2 ratios are going to be very high - but the idea that you can air-cool 2.4kW from the CPUs alone (and at these speeds there are going to be a lot of other very warm components in there) in a 2U chassis is simply crazy.

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> This sounds fairly obviously fake. 128 cores at a TDP of 950W means only ~7.4W per core, which would be a massive improvement on the i9-9990XE - which can only do 5Ghz - and requires 18.4W per core

You’re comparing apples and oranges. The 9990-xe is on 14 nm process. This is on 5 nm. Beyond that, this appears to be an in order VLIW core. The 9990-xe is a deeply out of order core. In a modern processor, much of the power budget is taken up by the structures used for out of order execution, such as reorder buffers and schedulers. These structures often grow non-linearly with the amount of reordering capability of the CPU. Jettisoning them entirely saves huge amounts of power.

Well, the process size numbers between different companies have been somewhat meaningless for a while now, as they all measure different things. Intel's 14nm process is still larger than the 5nm TSMC process used here, but the difference is considerably smaller than the numbers suggest. It's a fair point about VLIW cores being a lot cheaper in terms of power budget though. I'm still extremely sceptical but I concede that at least on paper it's not impossible.

The difference is huge, for example, if we measure density there is 5x difference.

IBM had 5GHZ in 2014. [1] Clock speed is not a measure of performance alone.

Besides, most of the work in reaching a certain clock speed or target can be owed to the foundry (in this case TSMC which is world-leading, certainly beating Intel on most metrics at the moment.)

Comparing to the over-tuned enthusiast SKU of 2018 is not a fair comparison for either. Also 600W is not impossible to cool, there are GPUs at that level of power for a while now.

[1] https://en.wikipedia.org/wiki/POWER8

IBM hit 5 ghz in 2008: https://en.wikipedia.org/wiki/POWER6. IBM’s Cell hit 4 ghz in 2006 on a 65 nm process.

The advantages of chopping up chopping your pipeline stages in half so that each is 10 FO4s long rather than the 16 FO4s most people use. You've generally got 2 FO4s of latching and 2 of clock skew so IBM was seeing 6 FO4s of useful work per stage compared to 12 with Intel. Or at least the overhead was 4 per stage in the mid 2000s, I've got no idea what they are in the early 2020s.

And, if you have enough threads per core, it's relatively simple to switch to another thread when an instruction stalls. Unfortunately, most our software is designed for machines with few fast cores.

Given the main comparison target seems to be the H100 and

> The processor pipeline has its out of order execution handled by the compiler, not by hardware

This is not a direct competitor to general purpose CPUs, which makes the frequency claims a lot more realistic but also completely useless as a basis for comparison.

> The processor pipeline has its out of order execution handled by the compiler, not by hardware

I wonder how compilers improved at generating good ILP with VLIW designs. The Itanium suffered from poor performance because it was very difficult to generate optimally ordered code for it.

OTOH, with enough GHz, even a simple, inefficient, in-order architecture can be fast enough. That was what made RISC attractive in the 80's and 90's.

Or the cores are much, much simpler than Intel's cores, and designed for higher clock speeds.

They seem to be in-order VLIW cores, so yes, they are much simpler than any other server CPU.

Also how does this tiny company get access to 5nm manufacturing capability?

By signing a contract with TSMC? That's the fab according to the article. 5nm is not bleeding edge and as others move to N5P or N4, capacity gets freed at N5.

> 5nm is not bleeding edge and as others move to N5P or N4, capacity gets freed at N5.

Actually the article says it’s on N5P the same process as the Apple M2.

I think TSMC does give smaller companies access to cutting edge processes in small volumes but it won’t be cheap.

I’m still sceptical.

TSMC is much much denser than Intel 14nm keep in mind + these cores are probably much dumber than an Intel one.

The M1 Max (8+2 cores) tops out at a CPU TDP of around 30W IIRC, on the 5nm node. These numbers aren't that unrealistic, are they? Intel isn't exactly known for power efficiency currently, aside from E-cores.

M1 Max runs 0.6-3.2GHz - this is the efficiency range. Running higher requires more voltage which increases the power squared, and then the freq. is linear. The infamous cubic power scaling for increased frequency 5.5GHz is just unrealistic.

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