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Comment by WorldMaker | Hacker News Reader

I'm really curious at this point what would happen if someone tried to resurrect a design like the 432. Maybe not the 432 exactly because things like bit-aligned instructions are still awkward/weird and didn't turn out to be as useful as the designers hoped. (It seems like an obvious compromise because object-tagging taking so much RAM in an era where RAM was so expensive it is an easy bet that they felt a need to nickel and dime/golf program code size, if they could.)

But even just reusing the architecture as-was, it would certainly be cheaper and need fewer chips today. It might be fun to have a cheap Raspberry Pi-like board with a 432 to experiment coding against.

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The CHERI extension for ARM does this: https://www.cl.cam.ac.uk/research/security/ctsrd/cheri/. The Rust language is experimenting with adding language level pointer provenance apis that provide the same info to the compiler, and would presumably compile to the instructions if available, https://doc.rust-lang.org/nightly/std/ptr/index.html#strict-...

The ironic thing is that the performance analysis paper [*] found that the weird bit-aligned instructions iAPX 432 didn't actually help code size.

"Although the 432 has bit-variable length instructions, it requires more space than either the 68000 in Pascal or the VAX in C. Reasons include the lack of immediates and the inability to refer to a local variable or constant using fewer than 16 bits of address."

(From a modern perspective, the test programs are absurdly small: 120-2900 bytes. Nowadays, you probably couldn't even create a program that small.)

[*] https://archive.org/details/PerformanceEvaluationOfTheIntelA...

Well, I can make a guess: the experience of porting existing C code to it would be a horrible experience so it would never take off the ground because, you know, nobody ain't got time to rewrite the whole world from scratch.

My curiosity has nothing to do with running existing C code. The reference to Raspberry Pi should have made that obvious, I think. The idea would be to have something to play with as a hobbyist. Something to develop new compilers for to see what you can build and if what you can build is fun/interesting, even if it doesn't have commercial aspirations or "productive" uses and is only ever a "toy". You know, hobbyist fun.

Some of the GPU shader languages restrict the code so that it's "almost" impossible to have a segmentation fault.

I know it's not what you are looking for since it's not making nearly enough bounds checks. I thought I'd drop a mention since it's widely available.

Ah, well, that you can do this with FPGA prototyping even today, you know.

That is something that I know. That is why I suggested it might be cheap to explore the concept (at the bottom of my post) and part of why I'm curious to see others try. I personally have college experience in FPGA prototyping but primarily have focused my efforts on software development then and since, I wouldn't have much fun myself building an FPGA prototype of something like the 432 by myself. But if someone sent me a cute RPi-like board and an okay (doesn't have to be great) assembler/debugger for it, I'd certainly give it a try seeing if I could assemble something interesting like a compiler for a next higher-level language. If that same someone were to build enough of the boards to build an entire community of hobbyist developers more than just me, that would be even better and really interesting and the biggest reason to mention it as a curiosity on a site like this, not to do a one-off thing to scratch a personal itch but to wonder what a community of hobbyists could do together as a group.

I have wondered the same thing. I would adore to have the knowledge to resurrect stuff like this. Something I’ve always wanted to do is revamp ISAs like the 432 or DEC J-11 etc. on modern process nodes and see what kind of performance could be eked out.

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