Out of scope for this blog post, but I also believe there is tremendous potential for hardware that broadly resembles existing GPUs (same register layout, instruction scheduling, memory hierarchy) but with fewer limitations and performance problems. For example, the queue that's currently hardcoded between vertex and fragment shaders could be exposed as a general purpose queue primitive, allowing more dynamic scheduling of multiple different kernels in parallel. I haven't done a deep enough dive into hardware to make concrete proposals, but as I explore, I get more and more indications that what we have access to is a fairly limited subset of what's possible.