How did they handle implementation differences between SoCs? Do all RISC-V SoC have exact same memory maps and SFR behaviors?
Note that newer SBCs have efforts implementing UEFI spec[0], and RISC-V is working on OS-A Platform spec[1], which further reduces basic peripheral and memory map differences.
0. https://github.com/riscv-non-isa/riscv-uefi/releases
1. https://github.com/riscv/riscv-platform-specs/blob/main/risc...
0. https://github.com/riscv/riscv-platform-specs/blob/main/risc...